The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 17, 2024
Filed:
Jun. 25, 2020
Telefonaktiebolaget Lm Ericsson (Publ), Stockholm, SE;
Sunny Sharma, Limhamn, SE;
TELEFONAKTIEBOLAGET LM ERICSSON (PUBL), Stockholm, SE;
Abstract
A SAR ADC () is disclosed. It comprises a differential input port having a first input (V) configured to receive a first input voltage and a second input (V) configured to receive a second input voltage, of opposite polarity compared with first input voltage. Furthermore, it comprises a () having a first sub circuit (P) comprising a first plurality of capacitors (C, C), each connected to a common node (P) of the first sub circuit (P) with a first terminal, and a second sub circuit (N) comprising a second plurality of capacitors (C, C), each connected to a common node (N) of the second sub circuit (N) with a first terminal. For each capacitor (C, C) of the first plurality of capacitors, the first sub circuit (P) comprises a first switch (S) connected between the first input (V) of the SAR ADC and a second terminal of that capacitor, a second switch (S) connected between a first reference-voltage input (V) and the second terminal of that capacitor, a third switch (S) connected between a second reference-voltage input (V) and the second terminal of that capacitor, and a capacitive device (X) connected between the second input (V) of the SAR ADC and the second terminal of that capacitor. The second sub circuit is arranged in a similar way.