The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 17, 2024
Filed:
Aug. 16, 2022
Apple Inc., Cupertino, CA (US);
Alexander B. Uan-Zo-li, Hillsboro, OR (US);
Shuai Jiang, San Jose, CA (US);
Jamie L Langlinais, Los Gatos, CA (US);
Per H. Hammarlund, Sunnyvale, CA (US);
Hans L Yeager, Chapel Hill, NC (US);
Victor Zyuban, Sunnyvale, CA (US);
Sung J. Kim, San Carlos, CA (US);
Wei Xu, Cupertino, CA (US);
Rohan U. Mandrekar, Sunnyvale, CA (US);
Sambasivan Narayan, Saratoga, CA (US);
Mohamed H. Abu-Rahma, Mountain View, CA (US);
Jaroslav Raszka, Morgan Hill, CA (US);
Robert O. Bruckner, Gilbert, AZ (US);
Apple Inc., Cupertino, CA (US);
Abstract
A power delivery sub-system included in a computer system employs a primary voltage regulator circuit that generates a primary supply voltage on a primary power supply node. The power delivery sub-system also includes multiple bypass voltage regulator circuits that source corresponding bypass currents to a local power supply nodes in an integrated circuit. The integrated circuit includes multiple circuit blocks coupled to corresponding ones of the local power supply nodes, and multiple local voltage regulator circuits coupled to the primary power supply node. When a voltage level of a given local power supply node drops below a threshold value, a corresponding local voltage regulator circuit sources a supply current to the given local power supply node.