The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 17, 2024

Filed:

Dec. 05, 2022
Applicant:

Tesla, Inc., Austin, TX (US);

Inventors:

Daniel William Bailey, Austin, TX (US);

David Glasco, Austin, TX (US);

Assignee:

Tesla, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/18 (2006.01); G06F 9/52 (2006.01); G06F 11/07 (2006.01); G06F 11/14 (2006.01); G06F 11/16 (2006.01); G06F 11/20 (2006.01); G06F 11/267 (2006.01); G06F 11/30 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1469 (2013.01); G06F 9/52 (2013.01); G06F 11/0724 (2013.01); G06F 11/0796 (2013.01); G06F 11/1629 (2013.01); G06F 11/1658 (2013.01); G06F 11/181 (2013.01); G06F 11/183 (2013.01); G06F 11/2028 (2013.01); G06F 11/267 (2013.01); G06F 11/3013 (2013.01); G06F 2201/805 (2013.01); G06F 2201/82 (2013.01);
Abstract

A parallel processing system includes at least three parallel processors, state monitoring circuitry, and state reload circuitry. The state monitoring circuitry couples to the at least three parallel processors and is configured to monitor runtime states of the at least three parallel processors and identify a first processor of the at least three parallel processors having at least one runtime state error. The state reload circuitry couples to the at least three parallel processors and is configured to select a second processor of the at least three parallel processors for state reload, access a runtime state of the second processor, and load the runtime state of the second processor into the first processor. Monitoring and reload may be performed only on sub-systems of the at least three parallel processors. During reload, clocks and supply voltages of the processors may be altered. The state reload may relate to sub-systems.


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