The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 17, 2024

Filed:

Jun. 15, 2022
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Hyunil Kim, Seongnam-si, KR;

Jisu Kang, Seoul, KR;

Taewook Park, Seoul, KR;

Hongmook Choi, Bucheon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/10 (2006.01); G06F 1/08 (2006.01); G06F 1/12 (2006.01); G11C 29/02 (2006.01); G11C 29/56 (2006.01); H03K 21/38 (2006.01);
U.S. Cl.
CPC ...
G06F 1/10 (2013.01); G06F 1/08 (2013.01); G06F 1/12 (2013.01); G11C 29/023 (2013.01); G11C 29/56004 (2013.01); H03K 21/38 (2013.01);
Abstract

A clock generating circuit includes an oscillator, a clock counter, a finite state machine, and a non-volatile memory. The oscillator outputs an oscillator clock signal having a period based on a trim value. The clock counter counts the oscillator clock signal for a reference time. The finite state machine obtains the count value of the counted oscillator clock signal from the clock counter, and in a test mode, compares the count value with a target count value and changes the trim value based on the comparison result and determines a final trim value based on the changed trim value. The non-volatile memory stores the final trim value that is determined.


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