The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 10, 2024

Filed:

Dec. 14, 2021
Applicant:

Stmicroelectronics S.r.l., Agrate Brianza, IT;

Inventors:

Fulvio Vittorio Fontana, Monza, IT;

Michele Derai, Milan, IT;

Assignee:

STMicroelectronics S.r.l., Agrate Brianza, IT;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/48 (2006.01); H01L 21/78 (2006.01); H01L 23/495 (2006.01);
U.S. Cl.
CPC ...
H01L 21/4828 (2013.01); H01L 21/4832 (2013.01); H01L 21/78 (2013.01); H01L 23/49548 (2013.01); H01L 23/49582 (2013.01);
Abstract

A semiconductor chip is mounted at a first surface of a leadframe and an insulating encapsulation is formed onto the leadframe. An etching mask is applied to a second surface of the leadframe to cover locations of two adjacent rows of electrical contacts as well as a connecting bar between the two adjacent rows which electrically couples the electrical contacts. The second surface is then etched through the etching mask to remove leadframe material at the second surface and define the electrical contacts and connecting bar. The electrical contacts include a distal surface as well as flanks left uncovered by the insulating encapsulation. The etching mask is then removed and the electrical contacts and the connecting bars are used as electrodes in an electroplating of the distal surface and the flanks of the electrical contacts. The connecting bar is then removed from between the two adjacent rows during device singulation.


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