The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 10, 2024

Filed:

May. 25, 2022
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Jaehyun Lim, Hwaseong-si, KR;

Taehyung Kim, Yongin-si, KR;

Sangshin Han, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/41 (2006.01); G11C 11/419 (2006.01); H01L 27/02 (2006.01); H10B 10/00 (2023.01);
U.S. Cl.
CPC ...
G11C 11/419 (2013.01); H01L 27/0207 (2013.01); H10B 10/12 (2023.02); H10B 10/18 (2023.02);
Abstract

A semiconductor device includes a first memory column group including a plurality of memory columns in which a plurality of bit cells are disposed; and a first peripheral column group including a plurality of peripheral columns in which a plurality of standard cells are disposed, wherein the plurality of standard cells are configured to perform an operation of reading/writing data from/to the plurality of bit cells through a plurality of bit lines, wherein the first memory column group and the first peripheral column group correspond to each other in a column direction, and wherein at least one of the plurality of peripheral columns has a cell height different from cell heights of the other peripheral columns, the cell height being measured in a row direction in which a gate line is extended.


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