Nonvolatile memory device and operation method thereof

Abstract

Disclosed is a nonvolatile memory device which include a memory cell array including a plurality of memory cells connected to a plurality of word lines, an address decoder that controls a selected word line among the plurality of word lines based on an address received from an external device including a first temperature sensor, a second temperature sensor that measures a read temperature of first memory cells connected to the selected word line from among the plurality of memory cells, and a temperature compensation circuit that calculates a read level offset based on the read temperature and a program temperature of the first memory cells measured by the first temperature sensor and generates a compensation read voltage based on the read level offset. The address decoder is further configured to provide the compensation read voltage to the selected word line.