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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12159898 B1

PDFFull Text
Date of Patent:
Dec. 03, 2024

Filed:

Aug. 19, 2020

Resistor geometry

Applicant:

Pragmatic Semiconductor Limited, Cambridge, GB;

Inventors:

Richard Price, Sedgefield, GB;

Robert Mann, Sedgefield, GB;

Assignee:

PRAGMATIC SEMICONDUCTOR LIMITED, Cambridge, GB;

Attorneys:

Jason H. Vick

Womble Bond Dickinson (US) LLP

Primary Examiner:

Kyung S Lee

Int. Cl.
CPC ...
H01C 7/00 (2006.01); H01C 1/01 (2006.01); H01C 1/14 (2006.01); H01C 17/00 (2006.01); H01C 17/075 (2006.01); H01C 17/28 (2006.01); H01L 21/02 (2006.01); H01L 21/8256 (2006.01); H01L 27/06 (2006.01); H01L 27/12 (2006.01); H01L 27/13 (2006.01); H01L 29/24 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01); H01L 29/872 (2006.01); H01L 49/02 (2006.01);
U.S. Cl.
CPC ...
H01L 28/24 (2013.01); H01C 1/01 (2013.01); H01C 1/14 (2013.01); H01C 7/006 (2013.01); H01C 17/003 (2013.01); H01C 17/075 (2013.01); H01C 17/28 (2013.01); H01L 21/02565 (2013.01); H01L 21/8256 (2013.01); H01L 27/0629 (2013.01); H01L 27/0676 (2013.01); H01L 27/1225 (2013.01); H01L 27/1255 (2013.01); H01L 27/127 (2013.01); H01L 27/13 (2013.01); H01L 28/20 (2013.01); H01L 29/24 (2013.01); H01L 29/66969 (2013.01); H01L 29/7869 (2013.01); H01L 29/78696 (2013.01); H01L 29/872 (2013.01);
Abstract

A thin-film resistor and a method for fabricating a thin-film resistor are provided. The thin-film resistor comprises a first terminal, a second terminal, and a resistor body providing a resistive current path between the first terminal and the second terminal, and the method comprises depositing a first layer of conductive material onto at least one of the supporting structure and the resistor body, applying a first lithographic mask to the first layer, and etching the first layer to form the first terminal; and depositing a second layer of conductive material onto at least one of the supporting structure and the resistor body, applying a second lithographic mask to the second layer, and etching the second layer to form the second terminal, wherein the first lithographic mask is different to the second lithographic mask, and a lateral separation of the first terminal and the second terminal is less than an in-plane minimum feature size of the first and second lithographic masks

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