The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 03, 2024

Filed:

Dec. 28, 2023
Applicants:

Ncku Research and Development Foundation, Tainan, TW;

Himax Technologies Limited, Tainan, TW;

Inventors:

Wei-Li He, Tainan, TW;

Soon-Jyh Chang, Tainan, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/4099 (2006.01); G06N 3/063 (2023.01); G11C 5/06 (2006.01); G11C 7/16 (2006.01); G11C 11/4074 (2006.01); G11C 11/4076 (2006.01); G11C 11/408 (2006.01); G11C 11/4094 (2006.01); G11C 11/54 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4099 (2013.01); G06N 3/063 (2013.01); G11C 5/06 (2013.01); G11C 7/16 (2013.01); G11C 11/4074 (2013.01); G11C 11/4076 (2013.01); G11C 11/4085 (2013.01); G11C 11/4094 (2013.01); G11C 11/54 (2013.01);
Abstract

A static random-access memory (SRAM) cell includes a first inverter and a second inverter being cross-coupled; a first access transistor that accesses an output of the first inverter under control of a word line; a second access transistor that accesses an output of the second inverter under control of the word line; a first passage transistor that passes a common-mode voltage, controlled by the output of the first inverter; a second passage transistor that passes an input signal, controlled by the output of the second inverter; and a capacitor switchably coupled to receive the common-mode voltage and the input signal through the first passage transistor and the second passage transistor respectively.


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