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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12156333 B1

PDFFull Text
Date of Patent:
Nov. 26, 2024

Filed:

Aug. 12, 2022

Method and configuration for stacking multiple printed circuit boards

Applicant:

Mellanox Technologies, Ltd., Yokneam, IL;

Inventors:

Xiuzhuang Yang, GuangDong, CN;

Huiying Chen, GuangDong, CN;

Weibin He, GuangDong, CN;

Di Wu, GuangDong, CN;

Assignee:

Mellanox Technologies, Ltd., Yokneam, IL;

Attorneys:

R. W. McCord Rayburn

Moore & Van Allen PLLC

Primary Examiner:

Xiaoliang Chen

Int. Cl.
CPC ...
H05K 1/02 (2006.01); H01G 4/012 (2006.01); H01G 4/12 (2006.01); H01G 4/224 (2006.01); H01G 4/232 (2006.01); H01G 4/248 (2006.01); H01G 4/30 (2006.01); H01G 4/33 (2006.01); H01G 4/40 (2006.01); H01L 23/22 (2006.01); H01L 23/498 (2006.01); H01L 23/50 (2006.01); H01L 23/544 (2006.01); H05K 1/11 (2006.01); H05K 1/14 (2006.01); H05K 1/18 (2006.01); H05K 3/32 (2006.01); H05K 3/34 (2006.01); H01G 4/38 (2006.01);
U.S. Cl.
CPC ...
H05K 1/145 (2013.01); H05K 1/113 (2013.01); H05K 1/141 (2013.01); H05K 1/181 (2013.01); H05K 3/3442 (2013.01); H01G 4/385 (2013.01); H05K 2201/09672 (2013.01); H05K 2201/10015 (2013.01); H05K 2201/10515 (2013.01); H05K 2201/1053 (2013.01); H05K 2201/10606 (2013.01);
Abstract

Electronic devices, electronic modules, and methods for manufacturing electronic devices and/or electronic modules are described herein. In some embodiments, the present invention may be directed to an electronic module that includes a pair of printed circuit boards (PCBs) and a capacitor positioned between the PCBs. Each of the PCBs may include a pair of vias configured to provide electrical connections through the PCB, and the capacitor may include a pair of pins. Each pin of the capacitor may be aligned with a via of one of the PCBs and a corresponding via of the other PCB such that each pin is configured to provide electrical connection between the two PCBs. Additionally, the pair of pins may be configured to support the PCBs with respect to each other.

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