logo

For the Inventor, By the Inventor

The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12154952 B1

PDFFull Text
Date of Patent:
Nov. 26, 2024

Filed:

Sep. 09, 2019

Laminate, semiconductor device, and method for manufacturing laminate

Applicant:

Shin-etsu Chemical Co., Ltd., Tokyo, JP;

Inventor:

Hiroshi Hashigami, Annaka, JP;

Assignee:

SHIN-ETSU CHEMICAL CO., LTD., Tokyo, JP;

Attorney:

Oliff PLC

Primary Examiner:

Mohammad A Rahman

Int. Cl.
CPC ...
H01L 29/22 (2006.01); C01G 15/00 (2006.01); H01L 21/02 (2006.01); H01L 29/739 (2006.01); H01L 29/778 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 29/2206 (2013.01); C01G 15/006 (2013.01); H01L 21/0242 (2013.01); H01L 21/02433 (2013.01); H01L 21/02483 (2013.01); H01L 21/02496 (2013.01); H01L 29/78 (2013.01); H01L 21/0262 (2013.01); H01L 29/7395 (2013.01); H01L 29/7786 (2013.01);
Abstract

The present invention is a laminate including: a crystal substrate; a middle layer formed on a main surface of the crystal substrate, the middle layer containing a mixture of an amorphous region in an amorphous phase and a crystal region in a crystal phase having a corundum structure mainly made of a first metal oxide; and a crystal layer formed on the middle layer and having a corundum structure mainly made of a second metal oxide. Thus, provided is a laminate having high-quality corundum-structured crystal with sufficiently suppressed crystal defects.

Find Patent Forward Citations

Hashigami, Hiroshi. (2024). Laminate, semiconductor device, and method for manufacturing laminate (U.S. Patent No. 12154952). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12154952

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…