The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 26, 2024

Filed:

Mar. 30, 2021
Applicant:

Innoscience (Suzhou) Technology Co., Ltd., Suzhou, CN;

Inventors:

Liang Chen, Suzhou, CN;

Hao Li, Suzhou, CN;

Haoning Zheng, Suzhou, CN;

King Yuen Wong, Suzhou, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 21/02 (2006.01); H01L 29/20 (2006.01); H01L 29/205 (2006.01); H01L 29/66 (2006.01); H01L 29/778 (2006.01);
U.S. Cl.
CPC ...
H01L 23/562 (2013.01); H01L 21/02381 (2013.01); H01L 21/0243 (2013.01); H01L 21/02458 (2013.01); H01L 21/02488 (2013.01); H01L 21/0254 (2013.01); H01L 29/2003 (2013.01); H01L 29/205 (2013.01); H01L 29/66462 (2013.01); H01L 29/7786 (2013.01);
Abstract

A III-nitride-based semiconductor device is provided. The III-nitride semiconductor device includes a silicon substrate having a surface with a periodic array of recesses formed therein. A discontinuous insulating layer is formed within each recess of the periodic array of recesses such that a portion of the silicon substrate surface between adjacent recesses is free from coverage of the discontinuous insulating layer. A first epitaxial III-nitride semiconductor layer is formed over the silicon substrate with the periodic array of recesses and discontinuous insulating layer formed thereon. A second III-nitride semiconductor layer is disposed over the first III-nitride semiconductor layer and has a bandgap greater than a bandgap of the first III-nitride semiconductor layer. At least one source and at least one drain are disposed over the second III-nitride semiconductor layer. A gate is also disposed over the second III-nitride semiconductor layer between the source and the drain.


Find Patent Forward Citations

Chen, Liang. (2024). Iii-nitride-based semiconductor devices on patterned substrates and method of making the same (U.S. Patent No. 12154864). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12154864

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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