The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 26, 2024

Filed:

Sep. 09, 2022
Applicant:

SK Hynix Inc., Gyeonggi-do, KR;

Inventor:

Kwang Soon Kim, Gyeonggi-do, KR;

Assignee:

SK hynix Inc., Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/22 (2006.01); G11C 7/10 (2006.01); G11C 8/04 (2006.01); G11C 8/10 (2006.01); H03K 19/20 (2006.01);
U.S. Cl.
CPC ...
G11C 7/222 (2013.01); G11C 7/106 (2013.01); G11C 8/04 (2013.01); G11C 8/10 (2013.01); H03K 19/20 (2013.01);
Abstract

A semiconductor device includes: a memory cell array including a plurality of memory cells; a data input/output circuit suitable for outputting data provided from the memory cell array in response to a couple of data output control signals; and a data output control circuit suitable for generating a couple of latch read enable signals and a couple of data output control timing signals based on a couple of complementary read enable signals, an internal enable signal and warming-up cycle information indicating different warming-up cycles, and outputting, according to the couple of data output control timing signals, the couple of data output control signals using the couple of latch read enable signals, one or more pulses of each of which are masked according to the warming-up cycle information.


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