The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 26, 2024

Filed:

Oct. 17, 2022
Applicant:

Db Hitek Co., Ltd., Bucheon-si, KR;

Inventors:

Sang Mok Lee, Incheon, KR;

Joon Tae Jang, Seoul, KR;

Seung Hoo Kim, Seoul, KR;

Ji Eon Kim, Bucheon-si, KR;

Assignee:

DB HiTek, Co., Ltd., Bucheon-si, KR;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/22 (2006.01);
U.S. Cl.
CPC ...
G11C 16/225 (2013.01);
Abstract

An input/output circuit for a memory and a method of controlling the same are disclosed. The input/output circuit and the method of controlling the same are configured to prevent a memory element from being falsely or incorrectly programmed due to an ESD pulse. More particularly, the input/output circuit and the method of controlling the same include an ESD detection unit configured to detect a programming voltage or an ESD pulse on a pad terminal, a control logic unit configured to transmit a first voltage or a second voltage according to the programming voltage and the ESD pulse, and a switch unit configured to perform a turn-on or turn-off operation according to the first voltage or the second voltage.


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