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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12150334 B1

PDFFull Text
Date of Patent:
Nov. 19, 2024

Filed:

Dec. 28, 2021

Organic light-emitting display apparatus having cavity between protection layer and edge of pixel electrode

Applicant:

Samsung Display Co., Ltd., Yongin-si, KR;

Inventors:

Taehyun Kim, Yongin-si, KR;

Seunghwan Cho, Yongin-si, KR;

Sangho Park, Yongin-si, KR;

Seungmin Lee, Yongin-si, KR;

Jungkyu Lee, Yongin-si, KR;

Joosun Yoon, Yongin-si, KR;

Jangdoo Lee, Yongin-si, KR;

Assignee:

SAMSUNG DISPLAY CO., LTD., Yongin-si, KR;

Attorney:

F. CHAU & ASSOCIATES, LLC

Primary Examiner:

Michael Jung

Int. Cl.
CPC ...
H10K 50/844 (2023.01); H10K 50/11 (2023.01); H10K 50/13 (2023.01); H10K 50/15 (2023.01); H10K 59/121 (2023.01); H10K 59/122 (2023.01); H10K 50/81 (2023.01); H10K 59/12 (2023.01);
U.S. Cl.
CPC ...
H10K 50/844 (2023.02); H10K 50/11 (2023.02); H10K 50/13 (2023.02); H10K 50/15 (2023.02); H10K 59/121 (2023.02); H10K 59/122 (2023.02); H10K 50/81 (2023.02); H10K 59/1201 (2023.02);
Abstract

A thin film transistor is disposed on a substrate. A via insulating layer having a via hole covers the thin film transistor. A pixel electrode is disposed on the via insulating layer and electrically connected to the thin film transistor through the via hole. A first protection layer surrounds the pixel electrode. A pixel-defining layer covers an edge region of the pixel electrode and at least a portion of the first protection layer. The pixel-defining layer includes an opening through which an upper surface of the pixel electrode is exposed. An opposite electrode faces the pixel electrode. An intermediate layer is disposed between the pixel electrode and the opposite electrode.

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