The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 19, 2024

Filed:

Aug. 26, 2021
Applicant:

Stmicroelectronics (Grenoble 2) Sas, Grenoble, FR;

Inventors:

Denis Cottin, Crolles, FR;

Fabrice Romain, Voreppe, FR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/356 (2006.01); G09G 3/3225 (2016.01); H03K 19/0185 (2006.01);
U.S. Cl.
CPC ...
H03K 3/356113 (2013.01); G09G 3/3225 (2013.01); H03K 3/35613 (2013.01); H03K 19/018521 (2013.01); G09G 2310/0289 (2013.01); G09G 2380/10 (2013.01);
Abstract

An output potential level among two first levels is delivered according to an input level among two second levels. The output potential level is delivered at a first node connecting together first and second transistors electrically in series between two second nodes of application of the first levels. A first DC voltage defining a high limit for the control voltage of the first transistor is delivered by a first voltage generator powered by one of the second nodes. A second DC voltage defining a high limit for the control voltage of the second transistor is delivered by a second voltage generator controlled by a value representative of the first voltage and powered between the second nodes.


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