The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 19, 2024

Filed:

Apr. 22, 2022
Applicant:

Fujitsu Limited, Kawasaki, JP;

Inventors:

Yukiko Oshikubo, Atsugi, JP;

Yoshihiro Nakata, Atsugi, JP;

Assignee:

FUJITSU LIMITED, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01);
U.S. Cl.
CPC ...
H01L 24/08 (2013.01); H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H01L 24/16 (2013.01); H01L 2224/0801 (2013.01); H01L 2224/08056 (2013.01); H01L 2224/08059 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/16238 (2013.01); H01L 2924/35121 (2013.01);
Abstract

A package with built-in electronic components that is to be soldered to an electronic circuit board includes: an insulating layer; an electronic component provided on one surface of the insulating layer; and a pad which is electrically connected to the electronic component and in which a plurality of openings that extend from a first surface of the pad in contact with a solder bump to the insulating layer are formed, wherein an area of the plurality of openings at the first surface is larger than an area of the plurality of openings at a second surface of the pad, which is an opposite surface to the first surface and is in contact with the insulating layer.


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