The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 19, 2024

Filed:

Mar. 21, 2022
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Johannes Uhlig, Soest, DE;

Jens Krugmann, Paderborn, DE;

Ulrich Nolten, Rüthen, DE;

Regina Nottelmann, Bad Sassendorf, DE;

Arthur Unrau, Geseke, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 21/48 (2006.01); H01L 23/053 (2006.01); H01L 23/49 (2006.01); H01L 25/07 (2006.01); H01L 23/24 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 23/564 (2013.01); H01L 21/481 (2013.01); H01L 23/053 (2013.01); H01L 23/49 (2013.01); H01L 25/072 (2013.01); H01L 23/24 (2013.01); H01L 23/3135 (2013.01);
Abstract

A housing for a power semiconductor module arrangement includes sidewalls and a lid. The lid includes a first layer of a first material having a plurality of openings, and second layer of a second material that is different from the first material. The second layer completely covers a bottom surface of the first layer. The second layer includes a plurality of protrusions, each protrusion extending into a different one of the plurality of openings of the first layer such that each of the plurality of openings is completely covered by one of the protrusions.


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