The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 19, 2024

Filed:

Jan. 25, 2024
Applicant:

Parry Labs, Llc, Alexandria, VA (US);

Inventors:

Marc Couture, Alexandria, VA (US);

Michael Palmer, Alexandria, VA (US);

Assignee:

Parry Labs, LLC, Alexandria, VA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/24 (2006.01); G06F 9/455 (2018.01); G06F 21/57 (2013.01); G06F 9/4401 (2018.01);
U.S. Cl.
CPC ...
G06F 21/575 (2013.01); G06F 9/45558 (2013.01); G06F 9/4401 (2013.01); G06F 2009/45587 (2013.01);
Abstract

In an aspect, a field-deployable hardware apparatus includes a stackable housing, a graphical processing unit disposed within the stackable housing, the graphical processing unit comprising a first plurality of processor cores, a general-purpose processor disposed within the stackable housing, the general-purpose processor comprising a second plurality of processor cores, at least a binary unit system disposed within the stackable housing and connecting the graphical processing unit to the general-purpose processor, and a memory communicatively connected to at least a core of the first plurality of cores and the second plurality of cores, the memory containing instructions configuring the at least a core to execute a hypervisor, wherein the hypervisor generates a virtual environment on the at least a core.


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