The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 19, 2024

Filed:

Jul. 22, 2021
Applicant:

Vmware, Inc., Palo Alto, CA (US);

Inventors:

Irina Calciu, Palo Alto, CA (US);

Andreas Nowatzyk, San Jose, CA (US);

Pratap Subrahmanyam, Saratoga, CA (US);

Assignee:

VMware LLC, Palo Alto, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 21/52 (2013.01); G06F 9/455 (2018.01); G06F 12/0815 (2016.01); G06F 12/0891 (2016.01); G06F 21/55 (2013.01);
U.S. Cl.
CPC ...
G06F 21/52 (2013.01); G06F 9/45558 (2013.01); G06F 12/0815 (2013.01); G06F 12/0891 (2013.01); G06F 21/556 (2013.01); G06F 2009/45587 (2013.01);
Abstract

While an application or a virtual machine (VM) is running, a device tracks accesses to cache lines to detect access patterns that indicate security attacks, such as cache-based side channel attacks or row hammer attacks. To enable the device to detect accesses to cache lines, the device is connected to processors via a coherence interconnect, and the application/VM data is stored in a local memory of the device. The device collects the cache lines of the application/VM data that are accessed while the application/VM is running into a buffer and the buffer is analyzed for access patterns that indicate security attacks.


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