The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 19, 2024
Filed:
Nov. 17, 2022
Applicant:
Cisco Technology, Inc., San Jose, CA (US);
Inventors:
Abhishek Bhat, Allentown, PA (US);
Ajay Bharadwaj, Breinigsville, PA (US);
Romesh Kumar Nandwana, Chapel Hill, NC (US);
Assignee:
CISCO TECHNOLOGY, INC., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03D 3/24 (2006.01); G04F 10/00 (2006.01); H03L 7/099 (2006.01);
U.S. Cl.
CPC ...
G04F 10/005 (2013.01); H03L 7/0992 (2013.01);
Abstract
A multi-segment digital-to-time converter is provided. The digital-to-time converter includes a plurality of delay stages arranged in series, and a plurality of local synchronization logic circuits each configured to control an associated delay stage of the plurality of delay stages. Each local synchronization logic circuit provides a digital-to-time converter code and a reset signal to the associated delay stage synchronized to a local input clock and a local output clock of the associated delay stage.