The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 12, 2024

Filed:

Oct. 28, 2022
Applicant:

Avago Technologies International Sales Pte. Limited, Singapore, SG;

Inventors:

Jan Mulder, Houten, NL;

Frank Van Der Goes, Zeist, NL;

Mohammadreza Mehrpoo, Eindhoven, NL;

Sijia Wang, Utrecht, NL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/66 (2006.01); H03M 1/74 (2006.01); H03M 1/00 (2006.01); H03M 1/08 (2006.01);
U.S. Cl.
CPC ...
H03M 1/662 (2013.01); H03M 1/74 (2013.01); H03M 1/00 (2013.01); H03M 1/002 (2013.01); H03M 1/0863 (2013.01); H03M 1/66 (2013.01); H03M 1/742 (2013.01);
Abstract

Described herein are systems and methods related to a converter including a first input, a second input, and a number of digital to analog converter (DAC) cells. A DAC cell includes a first circuit, a first leg associated with a first output of the DAC cell, and a second leg associated with a second output of the DAC cell. The first circuit is configured to provide a return to zero operation. The DAC cell is configured to provide a data magnitude at a polarity on at least one of the first leg or the second leg during at least a portion of the clock cycle. The data magnitude and the polarity being provided in accordance with a first signal at the first input and a second signal at the second input.


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