The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 12, 2024

Filed:

May. 17, 2022
Applicant:

Infineon Technologies Austria Ag, Villach, AT;

Inventors:

Manuel Escudero Rodriguez, Villach, AT;

Jon Azurza Anderson, Villach, AT;

Matthias J. Kasper, Villach, AT;

David Meneses Herrera, Villach, AT;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 1/00 (2007.01); H02M 1/42 (2007.01); H02M 3/158 (2006.01);
U.S. Cl.
CPC ...
H02M 1/0096 (2021.05); H02M 1/0085 (2021.05); H02M 1/4208 (2013.01); H02M 3/1588 (2013.01);
Abstract

Disclosed is a method and a control circuit. The method includes operating a buffer circuit () in a first operating mode or a second operating mode. Operating the buffer circuit () in the first operating mode includes buffering, by a capacitor parallel circuit including a first capacitor () and a second capacitor (), power (Po) provided by a power source () and received by a load (). Operating the buffer circuit () in the second operating mode includes supplying power to the load () by the second capacitor (), and regulating a first voltage (Upn) across the second capacitor (), wherein regulating the first voltage (Upn) comprises transferring charge from the first capacitor () to the second capacitor ().


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