The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12142221 B1

Date of Patent:

Nov. 12, 2024

Filed:

Jul. 18, 2023

Organic light-emitting diode (oled) display and method of manufacturing the same

Applicant:

Samsung Display Co., Ltd., Yongin-si, KR;

Inventor:

Chang-Soo Pyon, Yongin-si, KR;

Assignee:

SAMSUNG DISPLAY CO., LTD., Yongin-si, KR;

Attorney:

F. CHAU & ASSOCIATES, LLC

Primary Examiner:

Insa Sadio

Int. Cl.

CPC ...

G09G 3/00 (2006.01); G09G 3/3233 (2016.01); G09G 3/3258 (2016.01); G09G 3/3266 (2016.01); G09G 3/3291 (2016.01); H10K 50/805 (2023.01); H10K 50/842 (2023.01); H10K 59/121 (2023.01); H10K 59/123 (2023.01); H10K 59/124 (2023.01); H10K 59/131 (2023.01); H10K 71/00 (2023.01); H10K 59/12 (2023.01);

U.S. Cl.

CPC ...

G09G 3/3258 (2013.01); G09G 3/3233 (2013.01); G09G 3/3266 (2013.01); G09G 3/3291 (2013.01); H10K 50/805 (2023.02); H10K 50/8426 (2023.02); H10K 59/1213 (2023.02); H10K 59/123 (2023.02); H10K 59/124 (2023.02); H10K 59/131 (2023.02); H10K 59/1315 (2023.02); H10K 71/00 (2023.02); G09G 2300/0426 (2013.01); G09G 2300/043 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2300/0861 (2013.01); G09G 2310/0264 (2013.01); H10K 59/1201 (2023.02);

Abstract

An organic light-emitting diode (OLED) display is disclosed. In one aspect, the OLED display includes a lower substrate including a display area and a non-display area surrounding the display area, wherein a plurality of pixels are formed in the display area. The OLED display also includes an embedded circuit formed in the configured to apply a plurality of signals to the pixels, and an initialization wiring formed in the non-display area and configured to apply an initialization voltage to each of the pixels. The initialization circuit is formed in a layer so as to at least partially overlap with the area of the embedded circuit.

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