The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 12, 2024

Filed:

Jul. 18, 2022
Applicant:

Stmicroelectronics S.r.l., Agrate Brianza, IT;

Inventors:

Domenico Ragonese, Tremestrieri Etneo, IT;

Vincenzo Marano, Cinisello Balsamo, IT;

Giuseppe Antonio Di Genova, Pozzallo, IT;

Marco Minieri, Catania, IT;

Assignee:

STMicroelctronics S.r.l., Agrate Brianza, IT;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F 1/573 (2006.01);
U.S. Cl.
CPC ...
G05F 1/573 (2013.01);
Abstract

Disclosed herein is a system including a power transistor having a first conduction terminal coupled to a supply node, a second conduction terminal coupled to an output node, and a control terminal controlled by a drive signal. The system further includes a driver configured to receive an input voltage from an external component and generate the drive signal based thereupon, and a sense circuit. The sense circuit is configured to, when the power transistor is powering a load coupled to the output node: detect whether the power transistor has entered an overload condition, and if so, determine a duration of time that the power transistor is in the overload condition; and assert a diagnostic signal in response to the duration of time being outside of a time window.


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