The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 12, 2024

Filed:

Dec. 29, 2020
Applicant:

Beijing Voyager Technology Co., Ltd., Beijing, CN;

Inventors:

Sae Won Lee, Mountain View, CA (US);

Youmin Wang, Mountain View, CA (US);

Anan Pan, Mountain View, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B81B 3/00 (2006.01); G01S 7/481 (2006.01); G01S 17/931 (2020.01); G02B 26/08 (2006.01); G02B 26/10 (2006.01); H05K 1/02 (2006.01);
U.S. Cl.
CPC ...
G02B 26/0841 (2013.01); B81B 3/0018 (2013.01); G01S 7/4814 (2013.01); G01S 7/4817 (2013.01); G01S 17/931 (2020.01); G02B 26/105 (2013.01); H05K 1/0203 (2013.01); B81B 2201/042 (2013.01);
Abstract

A micro-electromechanical system (MEMS) apparatus has an array of micro-mirrors and a control circuit for rotating the micro-mirrors synchronously at a resonant frequency. The MEMS apparatus includes elements with different Coefficients of Thermal Expansion (CTE) for a die substrate coupled to the array of micro-mirrors, a die attach layer, a chip package coupled to the die substrate and a printed circuit board coupled to the chip package. The apparatus provides mechanisms for reducing changes in the resonant frequency due to changes in temperature causing stresses due to a mismatch between the CTE of the different elements. A thermoelectric cooler is used, along with the optional addition of heating resistors, additional pins to distribute stress, and the widened vias allowing room for the pins to bend and relieve stress on the chip package.


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