The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 05, 2024

Filed:

Oct. 13, 2021
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventor:

Yuto Omizu, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10B 41/35 (2023.01); H01L 27/12 (2006.01); H10B 43/35 (2023.01);
U.S. Cl.
CPC ...
H10B 41/35 (2023.02); H01L 27/1203 (2013.01); H10B 43/35 (2023.02);
Abstract

A first insulating film is formed on a semiconductor substrate in each of a first region in which a memory transistor is to be formed, a second region in which a selection transistor is to be formed, a third region in which a high-withstand-voltage transistor is to be formed, and a fourth region in which a low-withstand-voltage transistor is to be formed. Subsequently, the first insulating film in each of the first and second regions is removed. A second insulating film is formed on the semiconductor substrate in each of the first and second regions. A third insulating film having a trap level is formed on the second insulating film. The third insulating film in the second region and the second insulating film in the second region are removed. A fourth insulating film is formed on the third insulating film and on the semiconductor substrate in the second region.


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