The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 05, 2024
Filed:
Dec. 20, 2019
Applicant:
Osram Opto Semiconductors Gmbh, Regensburg, DE;
Inventor:
Andreas Plößl, Regensburg, DE;
Assignee:
OSRAM Opto Semiconductors GmbH, Regensburg, DE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 33/62 (2010.01); H01L 25/075 (2006.01); H01L 25/16 (2023.01); H01L 33/00 (2010.01); H01L 33/10 (2010.01); H01L 33/38 (2010.01); H01L 33/44 (2010.01); H01L 33/54 (2010.01);
U.S. Cl.
CPC ...
H01L 33/62 (2013.01); H01L 25/0756 (2013.01); H01L 33/0093 (2020.05); H01L 33/10 (2013.01); H01L 33/54 (2013.01); H01L 2933/0066 (2013.01);
Abstract
A method of producing an optoelectronic component includes providing a semiconductor wafer with a functional semiconductor layer that has electronic control elements, and a growth layer; generating a plurality of recesses in the semiconductor wafer exposing the growth layer in places; and epitaxially growing a plurality of semiconductor layer stacks on the exposed growth layer, wherein a surface of the exposed growth layer is used as a growth surface for the semiconductor layer stacks, and the growth surface is inclined to a main extension plane of the semiconductor wafer.