The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 05, 2024

Filed:

Oct. 14, 2020
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Youngki Jung, Suwon-si, KR;

Sangmin Shin, Suwon-si, KR;

Jinho Kim, Suwon-si, KR;

Chulgyu Jung, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/10 (2006.01); H01L 23/00 (2006.01); H01L 25/16 (2023.01); H01L 29/76 (2006.01); H01L 31/036 (2006.01); H01L 31/112 (2006.01);
U.S. Cl.
CPC ...
H01L 25/167 (2013.01); H01L 24/05 (2013.01); H01L 24/24 (2013.01); H01L 2224/02379 (2013.01); H01L 2224/02381 (2013.01); H01L 2224/24146 (2013.01);
Abstract

Provided are a light emitting diode (LED) module that enables a freedom in structure design thereof using a fan-out interconnection and an insulating layer, and a display device having the same. The LED module having a multi-layer structure includes substrate; a LED located on the substrate and emitting light toward the substrate; a plurality of upper electrodes located on the LED and connected to the LED; an upper insulating layer provided to surround the plurality of upper electrodes; a film on glass (FOG) electrode located on the upper insulating layer; and a fan out interconnection structure configured to connect the plurality of upper electrodes to the FOG electrode through the upper insulating layer.


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