The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 05, 2024

Filed:

Dec. 21, 2022
Applicant:

Tormem Inc., San Jose, CA (US);

Inventors:

Thao Nguyen, San Jose, CA (US);

Steven White, San Jose, CA (US);

Scott Burns, San Jose, CA (US);

Assignee:

TORmem Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0622 (2013.01); G06F 3/061 (2013.01); G06F 3/064 (2013.01); G06F 3/0655 (2013.01); G06F 3/0679 (2013.01); G06F 3/0683 (2013.01); G06F 13/4221 (2013.01); G06F 2213/0026 (2013.01);
Abstract

Provided is a disaggregated memory server, which in some examples is a rack-mounted hardware appliance comprising a pool of memory for allocation to memory clients. Examples of memory clients may include one or more rack-mounted computing devices co-located on a rack with the disaggregated memory server. The disaggregated memory server may be optimized for high-speed dynamic memory allocation to the other computing devices in the rack.


Find Patent Forward Citations

Nguyen, Thao. (2024). Disaggregated memory server having chassis with a plurality of receptacles accessible configured to convey data with pcie bus and plurality of memory banks (U.S. Patent No. 12135884). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12135884

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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