The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 05, 2024

Filed:

Apr. 29, 2022
Applicant:

Applied Materials, Inc., Santa Clara, CA (US);

Inventor:

Asaf Schlezinger, Modi'in, IL;

Assignee:

APPLIED MATERIALS, INC., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01N 21/95 (2006.01); G06T 1/00 (2006.01);
U.S. Cl.
CPC ...
G01N 21/9503 (2013.01); G06T 1/0007 (2013.01);
Abstract

Embodiments described herein provide for a defect detection system and method suitable for detecting defects on an edge of a wafer. The method includes placing at least two wafers sequentially on a conveyor. Images of at least the edges of each wafer placed on the conveyor are captured and sent to a controller. A defect detection software combines the images to show the edges of the wafers in a virtual stack. The virtual stack allows for a pattern of defects to be identified. The pattern of defects in close proximity will allow for identification of the defects in the edges of the wafers.


Find Patent Forward Citations

Schlezinger, Asaf. (2024). Edge inspection of silicon wafers by image stacking (U.S. Patent No. 12135296). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12135296

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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