The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 29, 2024
Filed:
Dec. 12, 2019
Applicant:
Comet Ag, Flamatt, CH;
Inventors:
Daniel Gruner, Müllheim, DE;
Andreas Hartmann, Hürtgenwald, DE;
Philippe Dennler, Mühleberg, CH;
Markus Reiff, Eschweiler, DE;
André Grede, Bern, CH;
Anton Labanc, Ehrenkirchen, DE;
Assignee:
COMET AG, Flamatt, CH;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/52 (2006.01); H01J 37/32 (2006.01); H03F 3/195 (2006.01); H03F 3/24 (2006.01);
U.S. Cl.
CPC ...
H03F 3/245 (2013.01); H01J 37/32183 (2013.01); H03F 3/195 (2013.01); H03F 1/523 (2013.01); H03F 2200/444 (2013.01); H03F 2200/451 (2013.01); H03F 2200/541 (2013.01);
Abstract
A radiofrequency, RF, power amplifier, including at least one field-effect transistor, FET, wherein a source terminal of the at least one FET is connected to ground. At least one diode is included, wherein a cathode of the at least one diode is connected to a drain terminal of the at least one FET and an anode of the at least one diode is connected to ground. An output network is connected to the drain terminal of the at least one FET. An input network is connected to a gate terminal of the at least one FET.