logo

For the Inventor, By the Inventor

The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12132443 B1

PDFFull Text
Date of Patent:
Oct. 29, 2024

Filed:

Jul. 15, 2022

Method and circuit arrangement for detecting an arc and photovoltaic (pv) inverter having a corresponding circuit arrangement

Applicant:

Sma Solar Technology Ag, Niestetal, DE;

Inventors:

Marcel Kratochvil, Kassel, DE;

Rainer Schmitt, Huenfeld, DE;

Torsten Otto, Ahnatal, DE;

Sybille Pape, Vellmar, DE;

Assignee:

SMA Solar Technology AG, Niestetal, DE;

Attorney:

Eschweiler & Potashnik, LLC

Primary Examiner:

Jermele M Hollington

Assistant Examiner:

Taqi R Nasir

Int. Cl.
CPC ...
G01R 31/66 (2020.01); H02J 3/14 (2006.01); H02J 3/38 (2006.01); H02S 40/32 (2014.01); H02S 40/36 (2014.01); H02S 50/00 (2014.01);
U.S. Cl.
CPC ...
H02S 50/00 (2013.01); G01R 31/66 (2020.01); H02J 3/14 (2013.01); H02J 3/381 (2013.01); H02S 40/32 (2014.12); H02S 40/36 (2014.12); H02J 2300/24 (2020.01);
Abstract

The disclosure describes a method for detecting an arc in a direct-current (DC) circuit comprising a DC load, a DC source supplying the DC load, and a circuit arrangement arranged between the DC source and the DC load. A power flow P between an input and an output of the circuit arrangement is suppressed by means of a switching circuit through cyclical interruption such that the power flow P is enabled in an active time window with the first period Δtand the power flow P is suppressed in an inactive time window with the second period Δt. Via detection of an input current Iflowing at the input and/or an input voltage Uapplied to the input and comparison of values of the input current Iand/or input voltage Udetected in the inactive time window with a current threshold value Ior a voltage threshold value Uan arc presence criterion is signaled if the input current Idetected in the inactive time window falls below the current threshold value Iand/or the input voltage Udetected in the inactive time window does not exceed the voltage threshold value U. The application also describes a circuit arrangement for detecting an arc and a photovoltaic (PV) inverter including such a circuit arrangement.

Find Patent Forward Citations

Loading…