The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 29, 2024

Filed:

Nov. 01, 2019
Applicant:

Nippon Telegraph and Telephone Corporation, Tokyo, JP;

Inventors:

Kazuya Matsuo, Musashino, JP;

Masahiro Yoshida, Musashino, JP;

Koya Mori, Musashino, JP;

Hiroyuki Tanaka, Musashino, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/48 (2006.01); G06F 8/35 (2018.01); G06F 9/455 (2018.01); G06F 9/50 (2006.01); G08G 1/01 (2006.01);
U.S. Cl.
CPC ...
G06F 9/5077 (2013.01); G06F 8/35 (2013.01); G06F 9/48 (2013.01); G06F 9/4806 (2013.01); G06F 9/4843 (2013.01); G06F 9/4881 (2013.01); G06F 9/50 (2013.01); G06F 9/5027 (2013.01); G06F 9/5038 (2013.01); G06F 9/5044 (2013.01); G06F 9/505 (2013.01); G06F 9/5083 (2013.01); G08G 1/0133 (2013.01); G08G 1/0141 (2013.01); G08G 1/0145 (2013.01);
Abstract

A technique for efficiently determining the optimal deployment for the application distribution processing can be offered. A distributed processing support apparatus configured to support distributed processing of an application on a plurality of information processing devices includes a source code acquisition unit configured to acquire a source code of the application; a source code partition unit configured to partition the source code into a plurality of logics; a candidate extraction unit configured to extract, based on a processing order of the logics of the application, information relating to the operational environments of the information processing devices, deployment pattern candidates of the logics which are to be deployed in a distributed manner to any of the information processing devices; and an optimal pattern determination unit configured to determine an optimal deployment pattern from the extracted deployment pattern candidates.


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