The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 29, 2024

Filed:

Mar. 25, 2020
Applicants:

Arm Limited, Cambridge, GB;

The Chancellor, Masters and Scholars of the University of Cambridge, Cambridge, GB;

Inventors:

Peng Sun, Cambridge, GB;

Timothy Martin Jones, Cambridge, GB;

Giacomo Gabrielli, Cambridge, GB;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2018.01); G06F 9/345 (2018.01); G06F 9/355 (2018.01); G06F 9/38 (2018.01);
U.S. Cl.
CPC ...
G06F 9/30036 (2013.01); G06F 9/3004 (2013.01); G06F 9/3555 (2013.01); G06F 9/3842 (2013.01);
Abstract

An apparatus and method are provided for speculatively vectorising program code. The apparatus includes processing circuitry for executing program code, the program code including an identified code region comprising at least a plurality of speculative vector memory access instructions. Execution of each speculative vector memory access instruction is employed to perform speculative vectorisation of a series of scalar memory access operations using a plurality of lanes of processing. Tracking storage is used to maintain, for each speculative vector memory access instruction, tracking information providing an indication of a memory address being accessed within each lane. Checking circuitry then references the tracking information during execution of the identified code region by the processing circuitry, in order to detect any inter lane memory hazard resulting from the execution of the plurality of speculative vector memory access instructions.


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