The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 29, 2024

Filed:

Mar. 23, 2023
Applicant:

Alpha Networks Inc., Hsinchu, TW;

Inventors:

Pao-Kang Mo, Hsinchu, TW;

Chien-Hua Wang, Hsinchu, TW;

Cheng-Tai Tien, Hsinchu, TW;

Shih-Feng Tseng, Hsinchu, TW;

Assignee:

ALPHA NETWORKS INC., Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4291 (2013.01); G06F 2213/0016 (2013.01); G06F 2213/0026 (2013.01);
Abstract

An apparatus for synchronous Ethernet comprises a processor, a field programmable gate array, a synchronizer, a physical layer implementor and a media accessing controller, wherein, the processor transmits a control data through a first transmission interface; the field programmable gate array receives the control data, generates a control instruction in accordance with the control data and transmits the control instruction through a second transmission interface; the synchronizer receives the control instruction and generates a synchronous clock in accordance with the control instruction; and each of the physical layer implementor and the media accessing controller receives and works in accordance with the synchronous clock and media accessing control protocol.


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