The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 22, 2024

Filed:

Mar. 03, 2023
Applicant:

Samsung Display Co., Ltd., Yongin-si, KR;

Inventors:

Seokkyu Han, Yongin-si, KR;

Younggil Park, Yongin-si, KR;

Jeonghun Kwak, Yongin-si, KR;

Kihyun Kim, Yongin-si, KR;

Sungwook Woo, Yongin-si, KR;

Sunwoo Lee, Yongin-si, KR;

Huiyeon Choe, Yongin-si, KR;

Assignee:

SAMSUNG DISPLAY CO., LTD., Yongin-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/14 (2006.01); H10K 59/121 (2023.01); H10K 59/131 (2023.01); H01L 27/12 (2006.01); H01L 29/786 (2006.01);
U.S. Cl.
CPC ...
H10K 59/1213 (2023.02); H10K 59/131 (2023.02); H01L 27/1225 (2013.01); H01L 27/124 (2013.01); H01L 27/1251 (2013.01); H01L 29/78648 (2013.01); H01L 29/78675 (2013.01); H01L 29/7869 (2013.01);
Abstract

The display apparatus includes a substrate, a first active layer disposed on the substrate, a first gate layer disposed on a layer covering the first active layer, the first gate layer including a first gate electrode, a second gate layer disposed on a layer covering the first gate layer, the second gate layer including an initialization line including a first part of a second electrode; a second active layer disposed on a layer covering the second gate layer, the second active layer including a second active region overlapping the first part of the second electrode; a third gate layer disposed on a layer covering the second active layer, the third gate layer including a second part of the second electrode overlapping the second active region; and a first source/drain layer disposed on a layer covering the third gate layer, the first source/drain layer including a first connection line.


Find Patent Forward Citations

Loading…