The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 22, 2024
Filed:
Mar. 10, 2022
Applicant:
Denso Corporation, Kariya, JP;
Inventor:
Shingo Tsuchimochi, Kariya, JP;
Assignee:
DENSO CORPORATION, Kariya, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/065 (2023.01); H01L 23/00 (2006.01); H01L 23/367 (2006.01); H01L 23/498 (2006.01); H01L 27/07 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0655 (2013.01); H01L 23/3675 (2013.01); H01L 23/49822 (2013.01); H01L 23/49833 (2013.01); H01L 23/49838 (2013.01); H01L 24/32 (2013.01); H01L 27/0727 (2013.01); H01L 2224/32225 (2013.01); H01L 2924/1811 (2013.01); H01L 2924/1815 (2013.01); H01L 2924/182 (2013.01);
Abstract
A semiconductor device includes a first insulating substrate and a first semiconductor element joined to the first insulating substrate through the first conductive spacer. The first insulating substrate includes a first insulating layer and a first inner conductive layer disposed at a side of the first insulating layer. The first inner conductive layer includes a surface having a first region and a second region. The second region surrounds the first region and has larger surface roughness than the first region. The first conductive spacer is joined to the first region of the first inner conductive layer through a first junction layer.