The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 22, 2024

Filed:

Feb. 14, 2022
Applicant:

Nanya Technology Corporation, New Taipei, TW;

Inventor:

Tzu-Ching Tsai, Taipei, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 23/532 (2006.01); H01L 23/535 (2006.01); H10B 12/00 (2023.01);
U.S. Cl.
CPC ...
H01L 21/7682 (2013.01); H01L 21/76828 (2013.01); H01L 21/76829 (2013.01); H01L 21/76841 (2013.01); H01L 21/76895 (2013.01); H01L 23/5329 (2013.01); H01L 23/535 (2013.01); H10B 12/00 (2023.02);
Abstract

The present disclosure provides a semiconductor device with a composite conductive feature and an air gap and a method for preparing the semiconductor device. The semiconductor device includes a first composite conductive feature and a second composite conductive feature disposed over a pattern-dense region of a semiconductor substrate. The semiconductor device also includes a third composite conductive feature and a fourth composite conductive feature disposed over a pattern-loose region of the semiconductor substrate. The semiconductor device further includes a dielectric layer disposed over the pattern-dense region and the pattern-loose region of the semiconductor substrate. A first portion of the dielectric layer between the first composite conductive feature and the second composite conductive feature is separated from the semiconductor substrate by an air gap, and a second portion of the dielectric layer between the third composite conductive feature and the fourth composite conductive feature is in direct contact with the semiconductor substrate.


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