Semiconductor memory device and method of operating the same

Abstract

A semiconductor memory device includes a memory cell array including memory cells, a peripheral circuit performing a read/verify operation of selected memory cells, and a control logic circuit controlling the read/verify operation of the peripheral circuit. The control logic circuit controls the peripheral circuit to apply a first voltage to a selected word line connected to the selected memory cells, float unselected word lines adjacent to the selected word line among unselected word lines, apply a first under-drive voltage lower than the first voltage to the selected word line during at least a partial period in which the unselected word lines adjacent to the selected word line are floated, and apply a second voltage higher than the first under-drive voltage and lower than the first voltage to the selected word line.