The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 22, 2024

Filed:

Aug. 26, 2022
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventor:

Naofumi Abiko, Kawasaki Kanagawa, JP;

Assignee:

Kioxia Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 11/56 (2006.01); G11C 16/10 (2006.01); G11C 16/26 (2006.01); G11C 16/34 (2006.01);
U.S. Cl.
CPC ...
G11C 11/5628 (2013.01); G11C 11/5642 (2013.01); G11C 11/5671 (2013.01); G11C 16/10 (2013.01); G11C 16/26 (2013.01); G11C 16/3459 (2013.01);
Abstract

A semiconductor memory device includes memory cell transistors and a control circuit. In a write operation, the control circuit executes multiple loops each including a program operation, a verify operation, and a bit scan operation. In the bit scan operation, the control circuit performs, a first process of generating verify result data in parallel for a group of memory cell transistors having different target threshold voltage states, the verify result data for each memory cell transistor in the group indicating whether the memory cell transistor has reached its target threshold voltage state, and a second process of calculating for each of the target threshold voltage states, the number of memory cell transistors that have not reached their target threshold voltage states.


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