The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 22, 2024

Filed:

Aug. 08, 2022
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Ahmad R. Ansari, San Jose, CA (US);

David P. Schultz, Seattle, WA (US);

Felix Burton, Foster City, CA (US);

Jeffrey Cuppett, Los Altos, CA (US);

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/07 (2006.01); G06F 9/30 (2018.01);
U.S. Cl.
CPC ...
G06F 11/0763 (2013.01); G06F 9/30101 (2013.01); G06F 11/0772 (2013.01);
Abstract

Embodiments herein describe integrity check techniques that are efficient and flexible by using local registers in a segment to store check values which can be used to detect errors in the local configuration data in the same segment. In addition to containing local registers storing the check values, each segment can include a mask register indicated which of the configuration registers should be checked and which can be ignored. Further, the segments can include a next segment register indicating the next segment the check engine should evaluate for errors.


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