logo

For the Inventor, By the Inventor

The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12120043 B1

PDFFull Text
Date of Patent:
Oct. 15, 2024

Filed:

Feb. 14, 2022

System and method for supporting scalable bit map based p_key table in a high performance computing environment

Applicant:

Oracle International Corporation, Redwood Shores, CA (US);

Inventors:

Bjørn Dag Johnsen, Oslo, NO;

Arvind Srinivasan, San Jose, CA (US);

Line Holen, Oslo, NO;

Assignee:

Oracle International Corporation;

Attorney:

TUCKER ELLIS LLP

Primary Examiner:

Jianye Wu

Int. Cl.
CPC ...
H04L 49/25 (2022.01); G06F 9/451 (2018.01); G06F 9/455 (2018.01); G06F 16/22 (2019.01); H04L 9/40 (2022.01); H04L 12/44 (2006.01); H04L 41/046 (2022.01); H04L 41/0803 (2022.01); H04L 41/14 (2022.01); H04L 43/0823 (2022.01); H04L 43/0882 (2022.01); H04L 45/02 (2022.01); H04L 45/48 (2022.01); H04L 49/00 (2022.01); H04L 49/10 (2022.01); H04L 49/15 (2022.01); H04L 49/356 (2022.01); H04L 67/10 (2022.01); H04L 67/1097 (2022.01); H04L 41/12 (2022.01);
U.S. Cl.
CPC ...
H04L 49/25 (2013.01); G06F 9/451 (2018.02); G06F 9/45558 (2013.01); G06F 16/2237 (2019.01); H04L 12/44 (2013.01); H04L 41/046 (2013.01); H04L 41/0803 (2013.01); H04L 41/14 (2013.01); H04L 43/0823 (2013.01); H04L 43/0882 (2013.01); H04L 45/02 (2013.01); H04L 45/48 (2013.01); H04L 49/10 (2013.01); H04L 49/15 (2013.01); H04L 49/30 (2013.01); H04L 49/358 (2013.01); H04L 49/70 (2013.01); H04L 63/20 (2013.01); H04L 67/10 (2013.01); H04L 67/1097 (2013.01); G06F 2009/45579 (2013.01); G06F 2009/45595 (2013.01); H04L 41/12 (2013.01);
Abstract

System and method for supporting scalable bitmap based P_Key table in a high performance computing environment. A method can provide, at least one subnet comprising one or more switches, a plurality of host channel adapters, and a plurality of end nodes. The method can associate the plurality of end nodes with at least one of a plurality of partitions, wherein each of the plurality of partitions are associated with a P_Key value. The method can associate each of the one or more switches with a bitmap based P_Key table of a plurality of bitmap based P_Key tables. The method can associate each of the host channel adapters with a bitmap based P_Key table of the plurality of bitmap based P_Key tables.

Find Patent Forward Citations

Loading…