logo

For the Inventor, By the Inventor

The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12114546 B1

PDFFull Text
Date of Patent:
Oct. 08, 2024

Filed:

Jul. 16, 2021

Array substrate including connection layer and display panel having the same

Applicant:

Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd., Shenzhen, CN;

Inventor:

Ruonan Wang, Shenzhen, CN;

Assignee:

SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD., Shenzhen, CN;

Attorneys:

PV IP PC

Wei Te Chung

Primary Examiner:

Phuc T Dang

Int. Cl.
CPC ...
H01L 29/08 (2006.01); H10K 59/122 (2023.01); H10K 59/131 (2023.01); H10K 59/80 (2023.01); H10K 102/00 (2023.01); H10K 102/10 (2023.01);
U.S. Cl.
CPC ...
H10K 59/131 (2023.02); H10K 59/122 (2023.02); H10K 59/80517 (2023.02); H10K 2102/102 (2023.02); H10K 2102/103 (2023.02); H10K 2102/351 (2023.02);
Abstract

An array substrate and a display panel are provided. The array substrate includes a substrate, a planarization layer, a connection layer, and an anode layer. The planarization layer is disposed on a side of the substrate and is provided with a first via hole. The connection layer includes a connecting portion. The connecting portion is disposed in the first via hole and extends to a surface of the planarization layer. The anode layer is disposed on a surface of the connecting portion away from the planarization layer. In the array substrate, the connecting portion is disposed between the planarization layer and the anode layer, which can prevent pixels of the display panel from generating black dots.

Find Patent Forward Citations

Wang, Ruonan. (2024). Array substrate including connection layer and display panel having the same (U.S. Patent No. 12114546). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12114546

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…