Microelectronic circuit capable of selectively activating processing paths, and a method for activating processing paths in a microelectronic circuit

Abstract

A microelectronic circuit comprises a plurality of logic units and register circuits arranged into a plurality of processing paths. At least one monitor circuit () is associated with a first register circuit (), said monitor circuit () being configured to produce a timing event observation signal as a response to a change in a digital value at an input (D) of the first register circuit () that took place later than an allowable time limit defined by a triggering signal (CP) to said first register circuit (). A first processing path goes through a first logic unit () to said first register circuit () and is a delay critical processing path due to an amount of delay that it is likely to generate. The microelectronic circuit comprises a controllable data event injection point () for controllably generating a change of a digital value propagating to said first logic unit () irrespective of what other data is processed on said first processing path. Said microelectronic circuit is configured to freeze a first digital value stored in said first register circuit () for a time during which the change generated through said controllable data event injection point () propagates to said first register circuit.