The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 08, 2024

Filed:

Feb. 22, 2022
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Mihir Narendra Mody, Bengaluru, IN;

Ankur Ankur, New Delhi, IN;

Vivek Vilas Dhande, Jalgaon, IN;

Kedar Satish Chitnis, Bengaluru, IN;

Niraj Nandan, Plano, TX (US);

Brijesh Jadav, Bengaluru, IN;

Shyam Jagannathan, Bengaluru, IN;

Prithvi Shankar Yeyyadi Anantha, Bengaluru, IN;

Santhanakrishnan Narayanan Narayanan, Bengaluru, IN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/28 (2006.01); G06F 9/48 (2006.01); G06F 13/16 (2006.01); G06F 13/42 (2006.01); G06F 15/78 (2006.01);
U.S. Cl.
CPC ...
G06F 13/28 (2013.01); G06F 9/4881 (2013.01); G06F 13/1673 (2013.01); G06F 13/4221 (2013.01); G06F 15/7807 (2013.01);
Abstract

A system-on-chip (SoC) in which trace data is managed includes a first memory device, a first interface to couple the first memory to a second memory external to the system-on-chip, and a first processing resource coupled to the first interface and the first memory device. The first processing resource includes a data buffer and a first direct access memory (DMA) controller. The first DMA controller transmits data from the data buffer to the first interface over a first channel, and transmits the data from the data buffer with associated trace information for the data to the first memory device over a second channel.


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