The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 08, 2024

Filed:

Apr. 21, 2023
Applicant:

Advanced Micro Devices, Inc., Santa Clara, CA (US);

Inventors:

Mihir Shaileshbhai Doctor, Santa Clara, CA (US);

Alexander J. Branover, Boxborough, MA (US);

Benjamin Tsien, Santa Clara, CA (US);

Indrani Paul, Austin, TX (US);

Christopher T. Weaver, Boxborough, MA (US);

Thomas J. Gibney, Boxborough, MA (US);

Stephen V. Kosonocky, Fort Collins, CO (US);

John P. Petry, San Diego, CA (US);

Assignee:

Advanced Micro Devices, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2019.01); G06F 1/3234 (2019.01); G06F 1/3287 (2019.01); G06F 1/3296 (2019.01);
U.S. Cl.
CPC ...
G06F 1/3287 (2013.01); G06F 1/3265 (2013.01); G06F 1/3278 (2013.01); G06F 1/3296 (2013.01);
Abstract

A processing device and method for efficient transitioning to and from a reduced power state is provided. The processing device comprises a plurality of components having assigned registers used to store data to execute a program and a power management controller, in communication with the plurality of components. The power management controller receives an indication that the plurality of components are idle, executes a process to enter a component into a reduced power state in response to receiving an acknowledgement from the component of a request from the power management controller to remove power to the component, and executes a process to exit the component from the reduced power state in response to the component being active.


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