The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 08, 2024

Filed:

Aug. 16, 2021
Applicant:

Daedalus Prime Llc, Bronxville, NY (US);

Inventors:

Travis T. Schluessler, Berthoud, CO (US);

Russell J. Fenger, Beaverton, OR (US);

Assignee:

Daedalus Prime LLC, Bronxville, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2019.01); G06F 1/20 (2006.01); G06F 1/3203 (2019.01); G06F 1/3206 (2019.01); G06F 1/3234 (2019.01); G06F 1/3287 (2019.01); G06F 1/329 (2019.01); G06F 9/50 (2006.01);
U.S. Cl.
CPC ...
G06F 1/3206 (2013.01); G06F 1/206 (2013.01); G06F 1/3203 (2013.01); G06F 1/3253 (2013.01); G06F 1/3287 (2013.01); G06F 1/329 (2013.01); G06F 9/5094 (2013.01); G06F 9/50 (2013.01); Y02D 10/00 (2018.01);
Abstract

An apparatus, method and system is described herein for efficiently balancing performance and power between processing elements based on measured workloads. If a workload of a processing element indicates that it is a bottleneck, then its performance may be increased. However, if a platform or integrated circuit including the processing element is already operating at a power or thermal limit, the increase in performance is counterbalanced by a reduction or cap in another processing elements performance to maintain compliance with the power or thermal limit. As a result, bottlenecks are identified and alleviated by balancing power allocation, even when multiple processing elements are operating at a power or thermal limit.


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