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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12108627 B1

PDFFull Text
Date of Patent:
Oct. 01, 2024

Filed:

Nov. 23, 2021

Display device and manufacturing method therefor

Applicant:

Japan Display Inc., Tokyo, JP;

Inventors:

Akihiro Hanada, Tokyo, JP;

Kentaro Miura, Tokyo, JP;

Hajime Watakabe, Tokyo, JP;

Ryo Onodera, Tokyo, JP;

Assignee:

JAPAN DISPLAY INC., Tokyo, JP;

Attorney:

XSENSUS LLP

Primary Examiner:

Victoria K Hall

Int. Cl.
CPC ...
H01L 27/32 (2006.01); H01L 51/56 (2006.01); H10K 59/121 (2023.01); H10K 59/126 (2023.01); H10K 71/00 (2023.01); H01L 27/12 (2006.01); H01L 29/786 (2006.01); H10K 59/12 (2023.01); H10K 59/123 (2023.01);
U.S. Cl.
CPC ...
H10K 59/1213 (2023.02); H10K 59/126 (2023.02); H10K 71/00 (2023.02); H01L 27/1225 (2013.01); H01L 27/1251 (2013.01); H01L 29/78618 (2013.01); H01L 29/78633 (2013.01); H01L 29/78675 (2013.01); H01L 29/7869 (2013.01); H10K 59/1201 (2023.02); H10K 59/123 (2023.02);
Abstract

A display device includes a first transistor having a first semiconductor layer, in which a first source region includes a first region in contact with a first source electrode, and a first drain region includes a second region in contact with a first drain electrode. The first source and drain regions, the first region, and the second region each include a first impurity element. In a region close to an interface between the first semiconductor layer and a first insulating layer, a concentration of the first impurity element included in the first and second regions is higher than a concentration of the first impurity element included in the first source region and the first drain region. A method of manufacturing a display device includes forming a first gate electrode and a light shielding layer on a first insulating layer, and forming a second semiconductor layer on the light shielding layer.

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