The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 01, 2024

Filed:

Apr. 07, 2022
Applicant:

Samsung Electro-mechanics Co., Ltd., Suwon-si, KR;

Inventors:

Kwang Yun Kim, Suwon-si, KR;

Seung Eun Lee, Suwon-si, KR;

Yong Hoon Kim, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01S 5/18 (2021.01); H05K 1/02 (2006.01); H05K 1/18 (2006.01); H01S 5/183 (2006.01);
U.S. Cl.
CPC ...
H05K 1/186 (2013.01); H05K 1/0298 (2013.01); H01S 5/183 (2013.01); H05K 2201/096 (2013.01); H05K 2201/10053 (2013.01); H05K 2201/10151 (2013.01); H05K 2201/2081 (2013.01);
Abstract

A printed circuit board (PCB) includes a substrate including a first insulating layer and first wiring patterns disposed on the first insulating layer, an optical sensing chip including a vertical cavity surface emitting laser (VCSEL) and a photodiode, disposed on the first insulating layer to be in contact with at least one of the first wiring patterns, a transimpedance amplifier (TIA) chip disposed to be spaced apart from the optical sensing chip on the first insulating layer and disposed to be in contact with at least one first wiring pattern, different from the first wiring pattern connected to the optical sensing chip, among the first wiring patterns, and a dielectric layer stacked on the substrate and having a hole exposing the VCSEL and the photodiode of the optical sensing chip. The optical sensing chip and the transimpedance amplifier chip are connected through a wiring pattern disposed on the dielectric layer.


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